VHDL Day 001 – getting to know
What Is VHDL
VHDL-1076 (VHSIC (Very High Speed Integrated Circuits) Hardware Description Language) is an IEEE Standard since 1987. It is “a formal notation intended for use in all phases of the creation of electronic systems. … it supports the development, verification, synthesis, and testing of hardware designs, the communication of hardware design data …” [Preface to the IEEE Standard VHDL Language Reference Manual] and especially simulation of hardware descriptions. Additionally, VHDL-models are a DoD requirement for vendors.
Today many simulation systems and other tools (synthesis, verification and others) based on VHDL are available. The VHDL users community is growing fast. Several international conferences organized by the VHDL Users Groups(s) have been held with relevant interest. Other international conferences address the topic as well.
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- AFD:
- Accellera Designers Forum
- AHDL:
- Analog Hardware Description Language
- BBS:
- Bulletin Board System
- DoD:
- USA Department of Defense
- FAQ:
- Frequently Asked Questions
- IEEE:
- The Institute of Electrical and Electronics Engineers. In case of VHDL, they defined the standard 1076
- LRM:
- Language Reference Manual
- TISSS:
- Tester Independent Support Software System
- VASG:
- VHDL Analysis and Standardization Group
- VFE:
- VHDL Forum Europe
- VHDL:
- VHSIC Hardware Description Language
- VHSIC:
- Very High Speed Integrated Circuits – A program of the DoD
- VI:
- VHDL International
- VIUF:
- VHDL International Users Forum
- VUG:
VHDL Users Group
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http://www.gmvhdl.com/introduc.htm :
Tags/标签: VHDL beginnerVHDL can wear many hats. It is being used for documentation, verification, and synthesis of large digital designs. This is actually one of the key features of VHDL, since the same VHDL code can theoretically achieve all three of these goals, thus saving a lot of effort. In addition to being used for each of these purposes, VHDL can be used to take three different approaches to describing hardware. These three different approaches are the structural, data flow, and behavioral methods of hardware description. Most of the time a mixture of the three methods are employed. The following sections introduce you to the language by examining its use for each of these three methodologies. There are also certain guidelines that form an approach to using VHDL for synthesis, which is not addressed by this tutorial.